Dr. Alessandro CurioniDr. Alessandro Curioni, Vice President Europe and Director IBM Research, Zurich, Switzerland

„Quantum Computing: From Curiosity to First Useful Applications“

There’s no denying it – we’re approaching the dawn of the commercial quantum era – a formative period when quantum computing and its early use cases rapidly develop as we go from becoming quantum ready to the ultimate goal of quantum advantage. While quantum computing is still in its infancy, developers, scientists, academics, and professionals are already exploring how quantum computing may address today’s unsolvable problems in industries such as financial services, automotive and chemistry. This presentation will share the status of the research and highlight some early success.

Dr. Alessandro Curioni is an IBM Fellow, Vice President of IBM Europe and director of the IBM Research Lab in Zurich, Switzerland. He was also recently appointed as the Watson IoT Research Relationship Executive.

Dr. Curioni is an internationally recognized leader in the area of high-performance computing and computational science, where his innovative thinking and seminal contributions have helped solve some of the most complex scientific and technological problems in healthcare, aerospace, consumer goods and electronics. He was a member of the winning team recognized with the prestigious Gordon Bell Prize in 2013 and 2015.

Dr. Curioni received his undergraduate degree in Theoretical Chemistry and his PhD from Scuola Normale Superiore, Pisa, Italy. He started at IBM Research – Zurich as a PhD student in 1993 before officially joining as a research staff member in 1998. His most recent position was Head of the Cognitive Computing and Computational Sciences department.

Professor Boris MurmannProfessor Boris Murmann, Stanford University, USA

„Mixed-Signal Techniques for Embedded Machine Learning Systems“ 

Over the past decade, machine learning algorithms have been deployed in many cloud-centric applications such as speech recognition, face identification, and photo search. As this rise of machine learning applications continues, it is clear that some of these algorithms must move “closer to the sensor,” thereby eliminating the latency of cloud access and providing a scalable solution that avoids the large energy cost per bit transmission through the network. In this talk, we will discuss mixed-signal techniques for the design of moderate-complexity, low-power inference algorithms. Specific examples include energy-efficient feature extraction for image and audio processing and custom mixed-signal convolutional neural networks.

Boris Murmann is a Professor of Electrical Engineering at Stanford University.  

He joined Stanford in 2004 after completing his Ph.D. degree in electrical engineering at the University of California, Berkeley in 2003. From 1994 to 1997, he was with Neutron Microelectronics, Germany, where he developed low-power and smart-power ASICs in automotive CMOS technology. Since 2004, he has worked as a consultant with numerous Silicon Valley companies. 

Dr. Murmann’s research interests are in mixed-signal integrated circuit design, with special emphasis on sensor interfaces, data converters and custom circuits for embedded machine learning. In 2008, he was a co-recipient of the Best Student Paper Award at the VLSI Circuits Symposium and a recipient of the Best Invited Paper Award at the IEEE Custom Integrated Circuits Conference (CICC). He received the Agilent Early Career Professor Award in 2009 and the Friedrich Wilhelm Bessel Research Award in 2012.  

He has served as an Associate Editor of the IEEE Journal of Solid-State Circuits, an AdCom member and Distinguished Lecturer of the IEEE Solid-State Circuits Society, as well as the Data Converter Subcommittee Chair and the Technical Program Chair of the IEEE International Solid-State Circuits Conference (ISSCC). He is the founding faculty co-director of the Stanford SystemX Alliance and the faculty director of Stanford's System Prototyping Facility (SPF). He is a Fellow of the IEEE. 

Benoît Dupont de DinechinBenoît Dupont de Dinechin, CTO Kalray 

"Kalray’s MPPA® Manycore Processor: At the Heart of Intelligent Systems"

Intelligent systems can be defined as cyber-physical systems with integration of high-integrity functions, such as control-command, along with high-performance functions, in particular signal processing, image processing and machine learning. Such intelligent systems are required by defense and aerospace applications, and by automated vehicles.

The Kalray MPPA3 manycore processor is designed as a building block for such intelligent systems. Its architecture comprises multiple compute units connected by on-chip global fabrics to external memory systems and network interfaces. Selecting compute units assembled from fully programmable cores, a large local memory and an asynchronous data transfer engine enables to match the high performance and energy efficiency of GPGPU processors, while avoiding their limitations.

For the high-performance functions, we illustrate how the MPPA3 processor accelerates deep learning inference by distributing computations across compute units and cores, and by offloading tensor operations to the tightly coupled coprocessor connected to each core. For the high-integrity functions, we present a model-based systems engineering approach based on multicore code generation from the synchronous-reactive language SCADE Suite from Ansys.

Benoît Dupont de Dinechin is the Chief Technology Officer of Kalray. He is the Kalray VLIW core main architect, and the co-architect of the Multi-Purpose Processing Array (MPPA) processor. Benoît also defined the Kalray software roadmap and contributed to its implementation. Before joining Kalray, Benoît was in charge of Research and Development of the STMicroelectronics Software, Tools, Services division, and was promoted to STMicroelectronics Fellow in 2008. Prior to STMicroelectronics, Benoît worked at the Cray Research park (Minnesota, USA), where he developed the software pipeliner of the Cray T3E production compilers. Benoît earned an engineering degree in Radar and Telecommunications from the Ecole Nationale Supérieure de l'Aéronautique et de l'Espace (Toulouse, France), and a doctoral degree in computer systems from the University Pierre et Marie Curie (Paris) under the direction of Prof. P. Feautrier. He completed his post-doctoral studies at the McGill University (Montreal, Canada) at the ACAPS laboratory led by Prof. G. R. Gao.

Benoît authored 14 patents in the area of computer architecture, and published over 55 conference papers, journal articles and book chapters in the areas of parallel computing, compiler design and operations research.

Wolfgang FurtnerWolfgang Furtner, Infineon, Munich, Germany

"Tiny AI – How sensors become truly smart"

Artificial Intelligence and Machine learning enable numerous new use cases for sensors. Many of today’s smart solutions depend on cloud intelligence. For making sensors ubiquitous some amount of local intelligence is required. But how do we make AI available for small embedded systems?

This talk gives on overview about sensor technology beyond audio and vision and the related Machine Learning techniques. It outlines how ML algorithms are optimized for embedded architectures. Low power inference methods and architectures are discussed and an outlook to new neural acceleration technology is provided.

Wolfgang Furtner studied electrical engineering / data processing technology at the Polytechnical University Munich, Germany.

Since 1995 he worked at Philips Semiconductors (now NXP) architecting graphics processing units (GPUs) and flat TV processors.

Since 2006 he is with Infineon as a system architect form embedded computing. He holds the technical lead position of a senior principal for concept and system engineering.

His area of work includes embedded architectures for artificial intelligence and machine learning, in particular focusing on edge computing and smart sensors.

He is active in international standardization (IEC, Mipi) and knowledgeable in automated code generation and rapid prototyping.


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Tutorials, June 23, 2019
early registration by May 17, 2019
Conference, June 24 – 26, 2019
early registration by May 17, 2019


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